Toshiba Licenses MIPS16(TM) ASE Architecture; Announces Roadmap For Full Line Of MIPS RISC Microprocessors From 32-Bit Through 64-Bit|
22 April, 1997
TOKYO -- Toshiba Corporation today announced that it has extended its technology license with the MIPS Group, a division of Silicon Graphics, Inc. by acquiring a license for the MIPS16 application specific extension (ASE).
In conjunction, Toshiba also unveiled a new microprocessor roadmap, which will provide a seamless line-up of world standard MIPS RISC processors ranging from the cost-conscious 32-bit to state-of-the-art, performance-oriented 64-bit. The newly added 32-bit device can offer the performance of 32-bit RISC at a cost comparable to 16-bit processors by adopting the MIPS16 ASE, which incorporates 16-bit length instructions along with conventional 32-bit length ones.
"With the addition of the MIPS16 ASE to our microprocessor roadmap, Toshiba will become the first of the MIPS Camp chip suppliers to provide full line-up of RISC cores which execute the complete set of MIPS instruction set architectures," said Dr. Kohyama, deputy group executive for Toshiba's Semiconductor Group.
This broad family of MIPS-based RISC microprocessors, named the TX System RISC series (abbreviation TX series) will be the focus for Toshiba's microprocessor business through 2000 and beyond. To support this major focus on RISC solutions, Toshiba is building a worldwide base of development centers, along with promotion and support systems.
Initially, the TX series will include the 32-bit TX39 (current R3900 family), the 64-bit TX49 (R4900 family) and the new 32-bit TX19 series with 16-bit instructions, which bridges the gap between CISC and RISC processors. During 1997, Toshiba is preparing the ASIC environment to enable customer-specific System RISC derivatives to be developed in each of the company's major design centers throughout the world. The TX series cores will be compliant with the Virtual Socket Interface standards, to enable them to be more easily combined with the customer's or third party intellectual property (IP) components. Each of the regional design centers, located in Tokyo, Japan; San Jose, California, USA; Düsseldorf, Germany; and Taipei, Taiwan will develop IP based on applications appropriate for local markets. Strategically important IP includes digital consumer electronics, personal computer and office automation and telecommunications applications.
"By coupling Toshiba's world class manufacturing and process technology with these System RISC cores and customer specific IP, we will provide a full range of innovative, cost-effective solutions, backed by regional development support," Dr. Kohyama said.
MIPS RISC microprocessors were the best selling embedded RISC solutions in 1996, and shipments of these devices tripled compared to the previous year, according to industry rankings published by Microprocessor Report (1-27-97).
|Information in the press releases, including product prices and specifications, content of services and contact information, is current on the date of the press announcement,but is subject to change without prior notice.|