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Toshiba to Launch World's Smallest 128 and 144 megabit RDRAMs

10 May, 1999

Tokyo--Toshiba Corporation today announced 128 and 144 megabit Rambus(R) DRAM (Dynamic Random Access Memory), bringing the two largest commercially available Rambus memory capacities to the smallest chips yet realized at this density. Sampling starts today and mass production will start in the third quarter of 1999.

Toshiba is a leader in the design and fabrication of advanced memory chips, including those incorporating the DRAM architecture developed by Rambus Inc. of the US. Rambus' high speed operating characteristics offer an operating frequency of 800MHz, pushing data transfers to up to 1.6 gigabytes a second, double the speed of 100 MHz DRAMs (PC100), the market's current state-of-the-art. High level support for graphics and other multimedia sources positions Rambus as the main-memory-of-choice for next-generation PCs, and Toshiba forecasts show the RDRAM segment growing to take approximately 50 percent of the main memory market by 2001.

With its new devices, Toshiba combines Rambus performance advantages with its leading-edge 0.2 micron lithography to create the industry's smallest 128 and 144 megabit devices, at only 103mm2 and 114mm2, respectively.

Toshiba uses its 62-pin chip scale package (CSP) package for the new lineup. This includes 62-pin CSP packages that can be built into RIMM (Rambus DRAM In-line Memory Module), which are expected to become the de facto standard package for next-generation PC memory modules.


Main features

  • Leading-edge 0.2μm CMOS lithography achieves the world's smallest chip size.
  • Operating frequencies of 800/711/600 MHz, support fast handling of large data sources, e.g. graphics.
  • CSP package supports a "mirror package" for large capacity RIMM memory modules. Chip with a mirror image pin arrangement can be mounted on the rear of the RIMM, realizing a capacity of 256/288 megabytes.

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