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Toshiba's New NOR-type Flash Memory Prevents Data Loss During Operation

2 March, 2000


Read While Write function brought to versatile
64Mb Nor-type flash memory

Tokyo--Toshiba Corporation today announced the world's first 64-megabit (Mb) NOR-type flash memory supporting the Read While Write function. The TC58FVT/B641 allow read operations to be performed during program and erase operations.

The Read While Write function allows data to be simultaneously read from memory bank while being written to another one. In practical terms, the chip supports improved functionality for digital products. For instance, when cellular phone users receive an incoming call while saving a file or updating the phone's address book, CPU operation (speaking on the phone) does not cancel the write operation.

Toshiba's new 64Mb NOR-type flash memory adopts 0.2μm CMOS technology with a channel erasing scheme and shallow trench isolation (STI). The result is the smallest chip yet to be brought to mass production and equally impressive performance characteristics: a power consumption of 2.7 to 3.6V and a random access time of 100 nanoseconds.

The fast growing markets for cellular phones and mobile terminals are the main demand centers for NOR-type flash memory. As personal digital products get smaller and offer more functions and applications, smaller flash memory chips offering a larger capacity, higher access speed and lower power consumption are a must. Toshiba seeks to take the lead in meeting this demand with its new chip. It will also seek to meet an even wider range of customer needs with a 32Mb NOR-type flash memory utilizing the same architecture as the 64Mb chip, which will be introduced in April.

Samples of the new 64Mb chip will be available at the end of March at a unit price of $60 and mass production will begin in April. The company aims to reach a production level of over 500,000 units per month by fall.

Key Specifications
Part numberTC58FVT641 ----- Top boot block
TC58FVB641 ----- Bottom boot block
Capacity64-megabit
Design rule0.2μm
Power sourceVCC=2.7 - 3.6V
Access time100ns
Package48 pin TSOP Type I
RWW bank structure17 banks (64k byte x 1, 448k byte x 1, 512k byte x 15)


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