Global
Japanese
Site Map
Global
Contact Us
Japanese
Site Map
Global
Contact Us
Outline of New LSI

  • Single-chip support for MPEG-4 video decoding, in conformity with the latest industry specifications. The LSI allows supports new capabilities for mobile terminals with no increase in size, and promotes lower power consumption, even for playback of motion pictures.

  • A 16-bit RISC processor, dedicated decoding hardware and 4Mbit of DRAM are integrated in a single chip. Dedicated MPEG-4 video decoding can cut power consumption for wireless mobile terminals.

  • Total system can be easily established by supporting an interface for digital video signal output.

  • The new LSI can decode QCIF data at 15 frames per second when motion pictures are played back at 40MHz.

  • Pipeline architecture that processes data in parallel and a clock gating function (low power management) that switches off the clock of non activating blocks cuts power consumption to 50mW during motion picture playback at 40MHz operation. A new circuit structure cuts off power supply to the whole chip when no motion picture is being played back.

Samples will be available in the first quarter of 2001 at US$33. Mass production will start from the third quarter of 2001.

Information in the press releases, including product prices and specifications, content of services and contact information, is current on the date of the press announcement,but is subject to change without prior notice.