Main Specifications

  • Thanks to the PLL circuit, products based on the original CISC architecture of TLCS-900 series can convert a maximum external clock speed of 10MHz to that of its 20MHz internal clock.

  • The fastest instruction execute time is 50 nanoseconds at an internal clock speed of 20MHz. Most instructions can be executed in one clock (50 nanosecond), while jump instructions can be completed in two clocks (100ns), with a maximum capability of 20 million instructions per second. Jump instructions changes the priority of data processing by putting aside the main application.

  • Optimized circuit design achieves 75mW power consumption, the lowest power consumption achieved in a product with a 20MHz internal clock.

  • Up to four resistor banks can be made available for control in real-time. Eight micro-sized direct memory accesses (DMA) for high speed processing are supported to transfer data up to 16 megabytes per second as external memory.

  • The new products are fully compatible to Toshiba's proprietary 16-bit microcomputers, TLCS-900/L, TLCS-900/L1 and TLCS-900/H cores, and C-compiler can effectively encode a program.

  • Toshiba's Real Time Emulator (RTE) model 25 controller can be used under this development environment, as can the RTE model 15 controller, a simple version of the RTE model 25 controller.


Information in the press releases, including product prices and specifications, content of services and contact information, is current on the date of the press announcement,but is subject to change without prior notice.