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Toshiba Demonstrates Operation of Single-Electron Transistor Circuit at Room Temperature

10 January, 2001


New Technologies applicable to Future Intelligent Personal Digital Assistants

Tokyo -- Toshiba Corporation today revealed that it has developed a single-electron transistor (SET) circuit of the type essential for future hybrid circuits combining quantum SET devices with conventional electronic devices. While small scale and experimental, Toshiba's fully functional SET circuit meets essential requirements: room-temperature operation, a non-volatile memory function that supports intelligent self-learning and self-development, and ultra-low power operation. The new circuit points the way forward toward personal digital assistants (PDA) with capabilities far surpassing those of today's most advanced personal computers.

Progress in large-scale integration has seen the capabilities of powerful desktops miniaturized into even more powerful handheld PCs, but now it is edging towards its physical limits. Once the circuit design rule moves into the uncharted territory of the sub-100 nanometer region, where circuit paths will be only 0.001 of the thickness of a human hair, present device technologies will begin to fail, and current leakage in transistors will become an immense problem.

SET offers a solution at the quantum level, through the precise control of a small number of individual electrons. The ultra-low power consumption of SET also promises new levels of performance for mobile applications.

SET operates by injecting or ejecting a single electron into or from a dot of silicon, so producing a change in electronic potential. That change must overcome thermal agitation, making optimized smallness of the dot essential for SET operation at a finite temperature. For example, operation at room temperature demands a nanometer-scale structure. This has proved so difficult to achieve that there have been no previous reports of room-temperature operation of SET circuits.

Toshiba has succeeded in fabricating nanometer-scale dots by treating a silicon surface with alkaline-based solutions. The resulting relief map shows a nanometer-scale alpine landscape, with the peaks providing the desired dots. Experiments with ultra-thin silicon on an insulator has confirmed the ability to achieve a cluster of nanometer-scale dots, which was used to fabricate single-electron transistors that operate even at room temperature.

In addition to realizing an essential fabrication for SET, the work at Toshiba has also achieved the desired memory function, as the circuit can store an electron in the valleys of electronic potential. This confirms that the SET can operate intelligently by storing information and performing actions based on its instructions.

The SET fabrication process is fully compatible with that of conventional CMOSFET, and Toshiba has successfully realized a hybrid system of SET and CMOSFET on a single chip. This has provided clear confirmation of the functionality of the chip's simple circuit, its memory operation and of operation based on the information stored in the device.

Toshiba continues to work on and refine the SET, towards the intelligent self-learning and self-development capabilities.

Details of the single-electron transistor, which was performed under the management of R&D Association for Future Electron Devices (FED) in a Ministry of International Trade and Industry (MITI) R&D program supported by New Energy and Industrial Technology Development Organization (NEDO), were presented at the recent International Electron Devices Meeting (IEDM) in San Francisco.


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