Toshiba Announces the World's First 64-Megabit Pseudo SRAMs|
20 September, 2001
Tokyo--Toshiba Corporation today announced the world's first 64-Megabit (Mb) Pseudo SRAMs. The new products integrate a DRAM-based cell with an SRAM interface and achieve higher density, high-speed performance and low power consumption. The four devices in the new series were fabricated with 0.175-micron (m) C-MOS process technology, have a standby current of 100 microamperes (A) and support access times of 80 or 85 nanoseconds (ns). The high-density memory, performance and low power consumption of the new Pseudo SRAMs meet the exacting requirements of advanced mobile phones and personal digital assistants.
Toshiba plans to use the four devices announced today, TC51W6416XB-80 and 85 and TC51W6417XB-80 and 85, to create a range of multi-chip packages (MCP), including SRAM and Pseudo SRAM, NAND and Pseudo SRAM and NOR, SRAM and Pseudo SRAM, and to make advances in smaller ball-grid array (BGA) packages through chip shrinkage.
Customers selecting the new Pseudo-SRAM will also be able to make use of advanced simulation models developed in cooperation with U.S. EDA developer and vendor, Denali Software Inc. Denali's Memory Modeler program simulator can be directly linked to the customer's VHDL and Verilog simulator to support high-level system simulation.
Outline of New Products
Specifications of New Products
Pricing and Availability
Toshiba's 64Mb Pseudo SRAMs will be available in sample quantities at the end of October 2001, priced at 5,000 yen each. Full production will follow in January 2002 at a monthly volume of 100,000 pieces.
|Information in the press releases, including product prices and specifications, content of services and contact information, is current on the date of the press announcement,but is subject to change without prior notice.|