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Toshiba Launches New Microprocessor for Network Applications and Printers

27 September, 2001

Tokyo--Toshiba Corporation today announced a 64-bit microprocessor, TMPR7901, designed to support such demanding applications as high performance network products and network printers and enhanced image processing for car navigation systems.

The core of the new reduced instruction set computer (RISC) microprocessor, the TX79 family, was developed by ArTile Microsystems, Inc., a fully-owned subsidiary of Toshiba America Electronic Components, Inc. The core of the processor is based on know-how cultivated in the joint-development with Sony Computer Entertainment Inc. of EmotionEngine(R), the processor used in PlayStation(R)2. It has a superscalar architecture that can simultaneously execute two tasks, a synchronous DRAM controller supporting the PC100 specification, and two 32-bit PCI bus interfaces for expansion of built-in systems. Integration of an Ethernet/media access controller (MAC) and enhanced LAN support assure total support for network printers and set-top boxes.

Samples of TMPR7901 will be available from March 2002 at a sample price of 9,000 yen. Mass production will start from June 2002 at 100,000 units per month.

Background of Development

Continued progress in IT and the emergence of digital broadcasting are stimulating demand for high performance microprocessors with the processing speed and capabilities to support advances in such products as set-top boxes and network printer. TMPR7901, the first product in the new "TX79" family, meets these needs by integrating high end support for essential peripheral functions, including memory controller, PCI bus, direct memory access (DMA) controller and Ethernet/MAC. TMPR7901 also has fewer external components, that offers simplified system circuit board design.

Major Outlines of New Product

  • The basic architecture of TX79 family is based on MIPS Technologies, Inc.'s RISC architecture.
  • Two 64-bit processing units are integrated. It also supports 2-way symmetric superscalar architecture that can simultaneously execute two tasks. A 128-bit internal data path can process multimedia task such as image processing.
  • Highly efficient data transfer can be achieved by integration of synchronous DRAM, two 32-bit PCI buses and eight-channel DMA controllers.
  • 32 kilobytes (KB) cache memory is integrated.
  • Two channels Ethernet/MAC are supported at 10 or 100 megabit per second (Mbps). Two PCI buses support data transfer via a PCI bus.
  • System-on-Chip (SoC) to customer specifications is supported.
  • Various development tools are fully supported by the third parties.

Major Specifications of New Products

  • 2-way symmetric Superscalar
    -Data bus can be configured to a single 128-bit channel or 2-channel 64-bit.
    -Two tasks can be simultaneously executed.
  • Support of multimedia task in 128-bit band width
  • Multiply-accumulate (MAC): 800 million MACs per second at 200MHz
  • Operating frequency: 200MHz
    -more than 400 million instructions per second
  • Floating point unit
    -200 million FLOPS at the peak time
    (Single-precision floating point operation)
    -100 million FLOPS at the peak time
    (Double-precision floating point operation)
  • Synchronous DRAM controller
    -64-bit-based PC100 and DIMM
    -Up to 2GB
  • PCI controller (in conformity with version 2.1)
    -Two 32-bit, 33MHz PCI controllers
    -PCI bus arbiter
    -Controller of jump command
  • DMA controller
    -8 channels
    -Data transfer from external memory to other external memory through DMA
    -Serial peripheral interface (SPI)
    -Data transfer between I/O port and memory through DMA
  • Programmable timer and counter
    -3-channel interval timers, pulse generator and watchdog timer
  • 2-channel Ethernet/MACs at 10 or 100Mbps
  • Package: 484-pin plastic ball grid array (BGA)

  • "PlayStation" and "EmotionEngine" are registered trademarks of Sony Computer Entertainment Inc.

Information in the press releases, including product prices and specifications, content of services and contact information, is current on the date of the press announcement,but is subject to change without prior notice.

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