| Toshiba to Collaborate with Sarnoff on Protecting ICs
from CDM Electrostatic Discharge|
13 December , 2005
TOKYO, JAPAN/GISTEL, BELGIUM (December 13, 2005) – Toshiba Corporation of Tokyo, Japan (www.toshiba.com) and Sarnoff Europe of Gistel, Belgium (www.sarnoffeurope.com) today announced that Toshiba will further extend its cooperation with Sarnoff to use new technology based on Sarnoff TakeCharge® to protect its ICs from charged device model (CDM) electrostatic discharge (ESD), which can destroy devices during testing, packaging, or assembly into systems.
Under the agreement Sarnoff will provide Toshiba with CDM protection solutions that Toshiba will integrate into analog /digital ICs. The effectiveness of the protection will be verified with very short transmission line pulse (VSTLP) tests, a novel industry standard methodology.
"System manufacturers are increasingly asking IC suppliers for CDM-protected devices," said Naoyuki Shigyo, chief specialist in the Analog CAD Engineering Department of Toshiba's Semiconductor Company. "Based on our previous success with TakeCharge, Sarnoff's CDM protection solution will help us meet that challenge and further solidify Toshiba's competitive position."
Toshiba has been using technology based on TakeCharge to protect its CMOS ICs from Human Body Model (HBM) and Machine Model (MM) ESD since 2000. The approach has been applied to high-volume 0.18µm, 0.13µm, and 90nm products.
"We are happy to extend our collaboration with Toshiba, a world leader in IC innovations," said Koen Verhaege, general manager of Sarnoff's Integrated Circuit Systems & Services business unit and executive director of Sarnoff Europe. "TakeCharge has proven effective in semiconductor products and processes around the world, and Sarnoff's IP portfolio gives TakeCharge users the tools to address any ESD challenge, including CDM."
CDM: Hazard to ICs
Devices can pick up a charge from simply sliding down a feeder during packaging or assembly. Since the current during a CDM event can reach tens of Amperes, it can be far more destructive than an HBM event. For this reason the industry is focusing attention on protecting today's more delicate ICs from the CDM type of ESD.
TakeCharge CDM protection solutions is part of an extensive set of ESD solutions used by many of the world's leading IC companies. TakeCharge IP gives users a "first-time-right" design approach that combines on-chip I/O area reduction with a high level of ESD protection, without compromising performance.
With more dies on a wafer and less time spent in (re)design, the technology has the potential to save millions of dollars in product development and production costs. It also helps eliminate the cost of additional mask sets.
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