TOKYO—Toshiba Corporation (TOKYO: 6502) today announced the launch of a 128-gigabyte (GB) embedded NAND flash memory module, the highest capacity yet achieved in the industry. The module is fully compliant with the latest e •MMCTM standard, and is designed for application in a wide range of digital consumer products, including smartphones, tablet PCs and digital video cameras. Samples will be available from September, and mass production will start in the fourth quarter (October to December) of 2010.
The new 128GB embedded device integrates sixteen 64Gbit (equal to 8GB) NAND chips fabricated with Toshiba's cutting-edge 32nm process technology and a dedicated controller into a small package only 17 x 22 x 1.4mm[3]. Toshiba is the first company to succeed in combining sixteen 64Gbit NAND chips, and applied advanced chip thinning and layering technologies to realize individual chips that are only 30 micrometers thick.
Toshiba now offers a comprehensive line-up of single-package embedded NAND Flash memories in densities from 2GB to 128GB. They integrate a controller to manage basic control functions for NAND applications, and are compatible with the JEDEC e •MMCTM Version 4.4 and its features. New samples of 64GB chips will also be available from August.
Demand continues to grow for large density chips that support high resolution video and deliver enhanced storage, particularly in the area of embedded memories with a controller function that minimizes development requirements and eases integration into system designs. Toshiba has established itself as an innovator in this key area, and is now reinforcing its leadership by being first to market with a 128GB generation module.
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Product Number
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Capacity
|
Package
|
Sample
Shipment
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Mass
Production
|
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THGBM2T0DBFBAIF
|
128GB
|
237Ball FBGA
17x22x1.4mm |
Sep. 2010
|
4Q, 2010 (Oct.-Dec.)
|
|
THGBM2G9D8FBAIF
|
64GB
|
237Ball FBGA
17x22x1.4mm |
Aug. 2010
|
4Q, 2010
(Oct.-Dec.) |
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Interface
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JEDEC e •MMCTM V4.4 standard HS-MMC interface
|
|
Power Supply Voltage
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2.7V to 3.6V (memory core);
1.65V to 1.95V / 2.7V to 3.6V (interface) |
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Bus width
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x1, x4, x8
|
|
Write Speed*
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21MB per sec. (Sequential/ SDR Mode)
21MB per sec. (Sequential /DDR Mode)* |
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Read Speed*
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46MB per sec. (Sequential/ SDR Mode)
55MB per sec. (Sequential/ DDR Mode)* |
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Temperature range
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-25degrees to +85degees Celsius
|
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Package
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153Ball FBGA (+84 support balls)
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* Target figures.
Information in the press releases, including product prices and specifications, content of services and contact information, is current on the date of the press announcement, but is subject to change without prior notice.