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Toshiba develops, manufactures 19nm generation NAND Flash Memory with world's largest density and smallest die size

128 Gb capacity in a 3-bit-per-cell chip on a 170mm2 die
23 Feb, 2012

TOKYO—Toshiba Corporation (TOKYO: 6502) today announced breakthroughs in NAND flash that secure major advances in chip density and performance. In the 19 nanometer (nm) generation, Toshiba has developed a 3-bit-per-cell 128 gigabit (Gb) chip with the world's smallest[1] die size—170mm2—and fastest write speed[2]—18MB/s of any 3-bit-per-cell device. The chip entered mass production earlier this month and Toshiba and its technology partner, SanDisk, unveiled its key technology advances at the International Solid State Circuits Conference (ISSCC) in San Francisco, California on Feb 22 (local time).

Manufacturers of NAND flash memories must respond to demand for higher densities at competitive costs for such applications as USB memories and memory cards. Toshiba has achieved both through the application of its innovative technologies.

The new 3-bit-per-cell 19nm generation device uses the three-step programming algorithm and air-gap technology[3] for transistors, effectively reducing coupling between memory cells down to 5%[4], achieving a write speed performance of 18MB/s. In three-step writing technology, it writes through rough distribution in the second step, and tightens as well-defined distribution at the third.

Toshiba has also optimized the peripheral circuit structure of the chip, securing a 20% reduction in area from current chips[5], an achievement that significantly contributed to the 170mm2 die size, the smallest yet achieved at this density.

Toshiba and SanDisk have maintained their continuing leadership in the development and manufacture of advanced NAND flash memory. Toshiba will promote further development in leading-edge process technologies to further widen the scope of application and to expand the NAND flash memory market.

[1]
As of February, 2012
[2]
As of February, 2012
[3]
Air gap is a technology that creates gap between the cells and reduce coupling between the cells
[4]
A comparison between 19nm process, 3-bit-per-cell product, without using the developed three-step technology
[5]
A comparison between 19nm process, 3-bit-per-cell product, with conventional circuit technology
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Information in the press releases, including product prices and specifications, content of services and contact information, is current on the date of the press announcement, but is subject to change without prior notice.

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