Toshiba has developed a receiver front-end chip adopting a 90-nm CMOS process for wireless personal area networks in the 60-GHz band.
The 1.25 mm× 2.52 mm chip integrates an on-chip dipole antenna, a low-noise amplifier, a down-conversion mixer and a phase-locked loop-based synthesizer. The fully-differential circuit configuration and optimized device structure as well as transmission-line structure have achieved stable receiving operations in the 60-GHz band.
A solid loop antenna built into an IC package has also been developed. This antenna connects each end of a wide metal plate mounted on the interposer in the IC package to one of the differential feed points on the IC chip, using two bonding wires. Since the metal plate requires no additional area in the conventional IC package, use of the loop antenna increases the gain by 5 dB to 8 dB without changing the size of the IC module compared with the case of using the on-chip dipole antenna.
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