Tokyo--Toshiba Corporation today announced the world's first single-chip MPEG-4 videophone System level IC for IMT-2000, the next generation digital mobile phone system scheduled for introduction in Japan in early 2001. Toshiba's System Level IC achieves full conformity with the latest industry standard video-and-speech compression and integrates an MPEG-4 video encoder and decoder (codec), a speech codec, an audio and video multiplexer and a 16 megabit (Mb) DRAM.

IMT-2000 handsets and mobile terminals will support transmission of high-quality motion pictures and improved sound quality. MPEG-4, a recently established video compression technology, is specifically designed for wireless video transmission and is expected to become a key element of IMT-2000 services.

Toshiba is the first semiconductor manufacturer to develop a single-chip System Level IC capable of supporting MPEG-4 image compression and decompression along with high quality sound, and that also offers the low power consumption that is indispensable for battery-powered mobile terminals. This complex single-chip device is another example of Toshiba's world class capabilities in system level integration.

Toshiba's leadership in 0.25-micron CMOS technology has allowed it to integrate the major video and audio processing functions on a single10.84mm x 10.84mm chip and to cut power consumption of the device to only 30% that of current multi-chip solutions. A battery-powered mobile videophone incorporating the new System Level IC will give about some two hours of continuous service, against one hour for the same phone with a multi-chip solution. Toshiba will release engineering samples in the 3Q of 2000 and follow up with a new version offering a lower power consumption at the end of 2000.

Details of the new MPEG-4 LSI were reported to International Solid-State Circuits Conference (ISSCC) 2000 in San Francisco on February 8 (U.S. time).

Outline of MPEG-4 LSI

• The World's First Single Chip LSI for Videophones
  The world's first single-chip solution brings together an MPEG-4 video codec and other key components, including a speech codec, multiplexer and a 16Mb embedded DRAM that enables page and word sizes to be best-optimized. The three 16-bit RISC processors integrated into the chip separately control the video codec, the speech codec and multiplexing of the audio and video streams. The LSI integrates most major specifications for mobile videophones, in conformity with IMT-2000, on a 10.84mm x 10.84mm chip.

• Low Power Consumption
  Full use is made of established low power consumption solutions, such as pipeline architecture processing data in parallel and a clock gating system that stops the clock of inactive blocks, and new solutions are also employed. These include optimized embedded DRAM configuration, an improved video codec circuit, and use of Variable-Threshold voltage CMOS (VTCMOS) to control threshold voltages in active and standby modes. Power consumption of the 60MHz chip is estimated at 240mW.

• Standby Leakage
  Threshold voltage control is crucial for cutting standby current leakage. VTCMOS raise threshold voltages of both n and p channel transistors during standby in order to reduce the leakage current of the circuit. As a result, the standby current of this chip is suppressed down to 26μA at 85.

• Motion Estimation
  Motion estimation is essential to reduce the volume of data required to reproduce the entire transmitted image. A novel motion estimation algorithm has been implemented, that minimizes the number of cycles to calculate a motion vector without degrading the image quality. As a result, the motion estimation time and its power consumption can be greatly reduced.

Main Specifications

• Process: 0.25μm CMOS process; triple-well and quad layer-metal structure
• Transistor count: 20.5 million
• Voltage: 3.3V 10% (I/O), 2.5V10% (Internal)
• Power consumption: 240mW at 60MHz/ 80μ W in standby mode
• Frame transfer rate: 15 frames/s (QCIF format)
• Chip size: 10.84 x 10.84mm
• Maximum frequency: 83.3MHz