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Toshiba Stacks 8Mb SRAM and 64Mb NOR Flash Memory In Multi-Chip Package Product

9 March, 2000

8Mb SRAM and 64Mb NOR flash memory will be also supplied individually

Tokyo--Toshiba today announced that it is set to become the first company in the world to integrate an 8Mb SRAM and 64Mb NOR flash memory in a single multi-chip package (MCP), a move that will support design of slimmer cellular phones.

Explosive growth in the mobile phone market is driving demand for NOR flash memories, used to store programs and data, and for low power consumption SRAMs, which support system operation by temporarily holding data for the CPU while it executes other tasks. Toshiba has employed the most advanced process technology available to shrink the size of SRAM and NOR flash memory chips and to combine them in an MCP only 9mm x 12mm.

The new MCP will be available in two architectures of boot block, TH50VSF3680AASB and TH50VSF3681AASB. Both are 56-ball Signal Ball Grid Array (BGA) packages and stack an 8Mb SRAM and a 64Mb NOR flash memory designed with 0.22μm and 0.2μm process technology, respectively. Samples will be available from end of March 2000 at a unit price of 10,000 yen and mass production will start from April 2000.

Toshiba is also ready to begin mass production of two new 8Mb SRAM supporting offering access speeds of 55nanoseconds (ns) or 70ns, and a new 64Mb NOR flash memory offering the smallest chip size in the 0.2μm process generation. Production of the SRAM will begin in March, and samples will be made available at 4,000 yen; the 64Mb NOR flash memory will start production in April, and samples will be priced at 6,000 yen.

The range of MCP products will be extended by a device stacking a 4Mb SRAM and a 64Mb NOR flash memory that will start sampling in April 2000.

Outlines of Products

  • World's first mass produced MCP stacking 8Mb SRAM and 64Mb NOR flash memory
  • Compact package size: 9mm x 12mm, employed the most advanced process technology in SRAM and NOR flash memory
  • Conforms to MCP specification finalized by Fujitsu, NEC and Toshiba
  • Pin assignments of SRAM and NOR flash memory are almost compatible.
  • Optimized ball pitch: 0.8mm
  • Read while write (RWW) function in 64Mb NOR - data read and writes data can be executed concurrently.


  • Part Numbers:
  • TH50VSF3680AASB --- Top boot block
    TH50VSF3681AASB --- Bottom boot block
  • Configuration:
  • 8Mb SRAM + 64Mb NOR flash memory (RWW type)
  • Operating Voltage:
  • VCC=2.7-3.0V
  • Access Time:
  • 100 ns
  • Package:
  • 56-ball Signal Ball BGA (9 x 12mm)

  • Information in the press releases, including product prices and specifications, content of services and contact information, is current on the date of the press announcement,but is subject to change without prior notice.

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