| Toshiba and Sony Make Major Advances in Semiconductor
3 December, 2002
TOKYO, December 3, 2002 -- Toshiba Corporation and Sony Corporation today announced the world's first 65-nanometer (nm) CMOS process technology for embedded DRAM system LSIs -- a major breakthrough in process technology for highly advanced, compact, single-chip system LSIs that will be only one-fourth the size of current devices while offering higher levels of performance and functionality.
The move to ubiquitous computing -- total connectivity at all times -- relies on high-performance equipment. These in turn require advanced SoC (system on chip) LSIs integrating ultra-high performance transistors and embedded high-density DRAM. In such devices, size and performance levels are directly related to process technology: finer lithography results in smaller devices that offer higher levels of performance. The new process technology announced by Toshiba and Sony and integration to a new level that allows bandwidths to be scaled up and the maximization of system performance.
Current system LSI devices on the market are produced with 130 nanometer process technologies. Toshiba, the recognized industry leader in advanced process technology, is the only company with mass production technology for 90nm process embedded DRAM system LSI, a technology it is currently deploying and that will meet ever increasing demand for more and more compact devices.
The new SoC technologies for 65nm process generation include: 1) a high-performance transistor with the world's fastest switching speed; 2) the world's smallest cell for embedded DRAM; and 3) the world's smallest cell for embedded SRAM.
The new process technology is the result of joint development of Toshiba Corporation and Sony Corporation of 90nm and 65nm CMOS process technology that was initiated in May 2001. Full details will be presented at the December 9 - 11 International Electron Devices Meeting (IEDM) in San Francisco.
Outline of new technology
Note: 1 nanometer = one billionth of a meter
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