Tokyo--Toshiba Corporation today announced the world's first 128-megabit (Mb) Pseudo SRAMs. The new products integrate a DRAM-based cell with an SRAM interface and achieve the higher density, high-speed performance and low power consumption required for advanced mobile phones and personal digital assistants. The two devices in the new series were fabricated with 0.175-micron CMOS process technology, have a standby current of 250 microamperes and support access times of 70 or 75 nanoseconds (ns).

The 128Mb PSRAM device designated TC51WHM716AXBN70 operates using a single power supply with a voltage range of 2.6 volts (V) to 3.3V for both core and input/output (I/O), while the second 128Mb device, the TC51WKM716AXBN75, supports 1.8V I/O.

The devices are packaged in 69-ball fine pitch ball grid array (FBGA), further reducing the board space requirements. In addition, Toshiba offers space-saving stacked multi-chip package (MCP) which incorporates PSRAM with other memory product combinations including Static Random Access Memory (SRAM), NOR Flash and NAND Flash.

Pricing and Availability

Toshiba's 128Mb Pseudo SRAMs will be available in sample quantities at the end of January 2003, priced at 5,000 yen each. Full production will follow in March 2003, at a monthly volume of 200,000 pieces.

Outline of New Products

• The world's highest capacity Pseudo SRAMs; developed with 0.175-micron CMOS process technology
• Standby current of 250 micoramperes with fastest access time of 70ns
• 3 microamperes standby can be realized by selecting deep power-down mode that does not retain any data in the memory cells.
• Page operation mode supports eight-word read/write per single access.
• Partial operation mode can hold selected data, saving stand-by current.
• External refresh control is not necessary.
• 9mm x 12mm fine pitch ball-grid array (FBGA) is supported.

Key Specifications