Corporate Research & Development Center


Research and Development

  • Research News
  • Research Fields
  • Awards
  • Media
  • Videos

Development of an embedded non-volatile memory technology for low-power and high-performance FPGAs



Toshiba has developed a technology by which a flash memory and CMOS transistor are adjacently integrated each other in the same chip. This technology enables the creation of non-volatile FPGAs with high performance and lower power consumption. Details of the technology were presented at the VLSI Technology Symposium, an international conference on semiconductor devices in Honolulu, Hawaii on June 12 (local time).

Development background

Over the past few years, the cost of developing custom LSIs has been rising and the market for FPGAs, which allow users to re-write the circuit information after manufacturing the chip, has been growing. An FPGA consists of logic elements for computation and memory to store circuit information. A high-performance FPGA consumes a large amount of power because it uses volatile memory (SRAM) for its logic element. Therefore, an FPGA with non-volatile flash memory is needed to reduce the power. However, it has been difficult to place the CMOS transistor, which is incorporated in the logic element, and flash memory on one chip because they differ largely in element structure and operating voltage.

Embedded non-volatile memory technology

Toshiba has developed a technology by which the CMOS transistor and flash memory are adjacently integrated each other by adopting MONOS flash memory, which has a different structure from that of a normal flash memory, and designing a better writing method and circuit structure.
This technology enables an FPGA to consume less power while operating as fast as a conventional SRAM-type FPGA, yet halve the area occupied by the memory. (Note 1)
By replacing the SRAM with MONOS flash memory, the data is not lost even when the power is cut off. As a result, extra power consumption is reduced by partially shutting off the power to the area within the chip that is not used while the FPGA is in operation. According to calculations by our test circuit, the product is expected to reduce the power consumption by about 40% when the logic usage is 80% compared with an SRAM-type FPGA.
Even when a large voltage is required for writing data in the flash memory, an FPGA maintains its performance through its writing method and circuit structure exploiting the hot electron phenomena (Note 2) which keeps the CMOS transistor properties from deteriorating.


The technology we have developed will be used within the Toshiba Group, and we are also considering licensing it to our potential partner companies.
We are continuing to study flash memory technology, including the above, to widen its application.

(Note 1) The memory accounts for about 30% of the area of the whole FPGA.

(Note 2) A writing method utilizing high-energy electrons flowing through an element.